doc/hw/bus__common_8vhdl_source.html

 use work.tim_common.word_width;


 package tim_bus is


     constant tim_bus_data_width     : integer := 32;


     type tim_bus_master_state is (BUS_RESET, IDLE, REQ, READ, WRITE);


 end package;

tim_common
Package header for all constants, functions and types used in TIM.
Definition: common.vhdl:14

tim_bus.tim_bus_data_width
integer  :=32 tim_bus_data_width
The number of multiplexed data and address lines on the bus.
Definition: bus_common.vhdl:14

tim_bus.tim_bus_master_state
  ( BUS_RESET  ,IDLE ,REQ ,READ ,WRITE ) tim_bus_master_state
The various state machine states of the bus master controller.
Definition: bus_common.vhdl:17

tim_bus
This package contains entity declarations and shared constant values for the bus logic modules...
Definition: bus_common.vhdl:11