tim_bus Package Reference

This package contains entity declarations and shared constant values for the bus logic modules. More...

Use Clauses
work.tim_common.word_width

Constants
tim_bus_data_width	integer := 32
	The number of multiplexed data and address lines on the bus.

Types
tim_bus_master_state	( BUS_RESET , IDLE , REQ , READ , WRITE )
	The various state machine states of the bus master controller.

Detailed Description

This package contains entity declarations and shared constant values for the bus logic modules.

Definition at line 11 of file bus_common.vhdl.

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The documentation for this class was generated from the following file:

• /home/ben/Documents/Projects/tim/hw/bus/bus_common.vhdl