tim_instructions Package Reference

Package that contains declarations and definitions for all instruction opcodes and their lengths. More...

Libraries
ieee

Use Clauses
ieee.std_logic_1164.all
ieee.numeric_std.all
work.tim_common.opcode_length

Constants
opcode_LOADR	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Load to register X from address in register Y with offset in register Z.
opcode_length_LOADR	integer := 4
	The length in bytes of the instruction.
opcode_LOADI	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Load to register X from address in register Y with immediate offset.
opcode_length_LOADI	integer := 4
	The length in bytes of the instruction.
opcode_STORI	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Store register X to address in register Y with offset in register Z.
opcode_length_STORI	integer := 4
	The length in bytes of the instruction.
opcode_STORR	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Store register X to address in register Y with immediate offset.
opcode_length_STORR	integer := 4
	The length in bytes of the instruction.
opcode_PUSH	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Push register X onto the top of the stack and decrement the stack pointer.
opcode_length_PUSH	integer := 4
	The length in bytes of the instruction.
opcode_POP	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Pop element at top of stack into register X and increment the stack pointer.
opcode_length_POP	integer := 4
	The length in bytes of the instruction.
opcode_MOVR	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Move the content of register X into register Y.
opcode_length_MOVR	integer := 4
	The length in bytes of the instruction.
opcode_MOVI	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Move immediate I into register X.
opcode_length_MOVI	integer := 4
	The length in bytes of the instruction.
opcode_JUMPR	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Jump to address contained within register X.
opcode_length_JUMPR	integer := 4
	The length in bytes of the instruction.
opcode_JUMPI	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Jump to address contained within instruction immediate.
opcode_length_JUMPI	integer := 4
	The length in bytes of the instruction.
opcode_CALLR	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Call to function who's address is contained within register X.
opcode_length_CALLR	integer := 4
	The length in bytes of the instruction.
opcode_CALLI	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Call to function who's address is contained within instruction immediate.
opcode_length_CALLI	integer := 4
	The length in bytes of the instruction.
opcode_RETURN	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Return from the last function call.
opcode_length_RETURN	integer := 4
	The length in bytes of the instruction.
opcode_TEST	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Test two general or special registers and set comparison bits.
opcode_length_TEST	integer := 4
	The length in bytes of the instruction.
opcode_HALT	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Stop processing and wait to be reset.
opcode_length_HALT	integer := 4
	The length in bytes of the instruction.
opcode_ANDR	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Bitwise AND two registers together.
opcode_length_ANDR	integer := 4
	The length in bytes of the instruction.
opcode_NANDR	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Bitwise NAND two registers together.
opcode_length_NANDR	integer := 4
	The length in bytes of the instruction.
opcode_ORR	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Bitwise OR two registers together.
opcode_length_ORR	integer := 4
	The length in bytes of the instruction.
opcode_NORR	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Bitwise NOR two registers together.
opcode_length_NORR	integer := 4
	The length in bytes of the instruction.
opcode_XORR	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Bitwise XOR two registers together.
opcode_length_XORR	integer := 4
	The length in bytes of the instruction.
opcode_LSLR	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Logical shift left the bits in register X by the value in register Y.
opcode_length_LSLR	integer := 4
	The length in bytes of the instruction.
opcode_LSRR	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Logical shift right the bits in register X by the value in register Y.
opcode_length_LSRR	integer := 4
	The length in bytes of the instruction.
opcode_NOTR	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Bitwise invert the specificed register.
opcode_length_NOTR	integer := 4
	The length in bytes of the instruction.
opcode_ANDI	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Bitwise AND two registers together.
opcode_length_ANDI	integer := 4
	The length in bytes of the instruction.
opcode_NANDI	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Bitwise NAND two registers together.
opcode_length_NANDI	integer := 4
	The length in bytes of the instruction.
opcode_ORI	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Bitwise OR two registers together.
opcode_length_ORI	integer := 4
	The length in bytes of the instruction.
opcode_NORI	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Bitwise NOR two registers together.
opcode_length_NORI	integer := 4
	The length in bytes of the instruction.
opcode_XORI	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Bitwise XOR two registers together.
opcode_length_XORI	integer := 4
	The length in bytes of the instruction.
opcode_LSLI	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Logical shift left the bits in register X by the immediate value.
opcode_length_LSLI	integer := 4
	The length in bytes of the instruction.
opcode_LSRI	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Logical shift right the bits in register X by the immediate value.
opcode_length_LSRI	integer := 4
	The length in bytes of the instruction.
opcode_IADDI	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Integer Add register X to immediate value.
opcode_length_IADDI	integer := 4
	The length in bytes of the instruction.
opcode_ISUBI	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Integer Subtract immediate value from register X.
opcode_length_ISUBI	integer := 4
	The length in bytes of the instruction.
opcode_IMULI	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Integer Multiply register X by immediate value.
opcode_length_IMULI	integer := 4
	The length in bytes of the instruction.
opcode_IDIVI	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Integer Divide register X by immediate value.
opcode_length_IDIVI	integer := 4
	The length in bytes of the instruction.
opcode_IASRI	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Integer Arithmetic shift register X right immediate value.
opcode_length_IASRI	integer := 4
	The length in bytes of the instruction.
opcode_IADDR	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Integer Add register X to register Y.
opcode_length_IADDR	integer := 4
	The length in bytes of the instruction.
opcode_ISUBR	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Integer Subtract register X from register Y.
opcode_length_ISUBR	integer := 4
	The length in bytes of the instruction.
opcode_IMULR	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Integer Multiply register X by register Y.
opcode_length_IMULR	integer := 4
	The length in bytes of the instruction.
opcode_IDIVR	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Integer Divide register X by register Y.
opcode_length_IDIVR	integer := 4
	The length in bytes of the instruction.
opcode_IASRR	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Integer Arithmetic shift register X right value in register Y.
opcode_length_IASRR	integer := 4
	The length in bytes of the instruction.
opcode_FADDI	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Floating point Add register X to immediate value.
opcode_length_FADDI	integer := 4
	The length in bytes of the instruction.
opcode_FSUBI	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Floating point Subtract immediate value from register X.
opcode_length_FSUBI	integer := 4
	The length in bytes of the instruction.
opcode_FMULI	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Floating point Multiply register X by immediate value.
opcode_length_FMULI	integer := 4
	The length in bytes of the instruction.
opcode_FDIVI	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Floating point Divide register X by immediate value.
opcode_length_FDIVI	integer := 4
	The length in bytes of the instruction.
opcode_FASRI	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Floating point Arithmetic shift register X right immediate value.
opcode_length_FASRI	integer := 4
	The length in bytes of the instruction.
opcode_FADDR	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Floating point Add register X to register Y.
opcode_length_FADDR	integer := 4
	The length in bytes of the instruction.
opcode_FSUBR	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Floating point Subtract register X from register Y.
opcode_length_FSUBR	integer := 4
	The length in bytes of the instruction.
opcode_FMULR	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Floating point Multiply register X by register Y.
opcode_length_FMULR	integer := 4
	The length in bytes of the instruction.
opcode_FDIVR	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Floating point Divide register X by register Y.
opcode_length_FDIVR	integer := 4
	The length in bytes of the instruction.
opcode_FASRR	std_logic_vector ( opcode_length - 1 downto 0 ) := std_logic_vector ( to_unsigned ( 0 , opcode_length ) )
	Floating point Arithmetic shift register X right value in register Y.
opcode_length_FASRR	integer := 4
	The length in bytes of the instruction.

Detailed Description

Package that contains declarations and definitions for all instruction opcodes and their lengths.

Definition at line 16 of file instructions.vhdl.

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The documentation for this class was generated from the following file:

• /home/ben/Documents/Projects/tim/hw/instructions.vhdl