T.I.M | ISA Specification
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This page lists all registers that are part of the ISA.
Registers are divided into two broad classes: general purpose and special purpose. There are sixteen registers in each class, addressable using four bits.
There are 16 general purpose registers that can be used for general computation. They are addressed using the memonics R0, R1, ... , R15
. It is these registers that can be used as source and destination registers for the operation instructions, as well as loading, storing and jumping.
Each register is 32 bits wide and addressed using four bits where 0000
corresponds to R0
, 0011
to R3
and so on.
There are 16 special purpose registers. Each one fulfills a particular role within the CPU and can only be accessed or modified in particular ways. All special purpose registers can have their values coppied to a general purpose register using the MOVSR instruction. General purpose registers can also have their values coppied into certain special registers using the MOVRS instruction. Not all special registers can be written to under all conditions though.
Memonic | Register | Description |
---|---|---|
PC | Program Counter | The program counter, contains address of next instruction. |
SP | Stack Pointer | Holds the address of the top stack element |
LR | Link Register | Holds the return address of the current function call. |
TR | Test Result | Holds the results of TEST instructions and overflows. |
SR | Status Register | Stores various status bits. |
IR /IS | Interrupt Registers | Used for servicing hardware interrupts. |
Tx | Temporary Registers | Eight temporary storage registers for variable spilling. |
The two unused registers are reserved for future features. Behavior of any instruction when addressing them is undefined.